1. Field of the Invention
The invention relates to programmable logic modules and in particular to multiplexer functionality, for example, in a field-programmable gate arrays or in a programmable application specific integrated circuit.
2. Background of the Invention
A programmable device is a versatile integrated circuit chip, the internal circuitry of which may be configured by an individual user to realize a user-specific circuit. Programmable devices include configurable logic sometimes referred to as field-programmable gate arrays (FPGA), programmable application specific integrated circuits (pASIC), logic cell array (LCA), programmable logic devices (PLD), and complex programmable logic devices (CPLD). To configure a programmable device, the user configures an on-chip interconnect structure of the programmable device so that selected input terminals and selected output terminals of selected on-chip circuit components are electrically connected together in such a way that the resulting circuit is the user-specific circuit desired by the user.
In a programmable device employing, for example, amorphous silicon antifuses, selected amorphous silicon antifuses disposed between selected wire segments are “programmed” to connect the selected wire segments together electrically. Which antifuses are programmed and which antifuses are left unprogrammed determines how the circuit components are interconnected and therefore determines the resulting functionality of the circuit. For background information on programmable devices employing antifuses, see, e.g.: U.S. Pat. No. 5,424,655 entitled “Programmable application specific integrated circuit employing antifuses and methods therefor”; U.S. Pat. No. 5,825,201 entitled “Programming architecture for a programmable integrated circuit employing antifuses”; and U.S. Pat. No. 6,426,649 entitled “Architecture for field programmable gate array.” The contents of these documents are incorporated herein by reference.
A programmable device may include a plurality of macrocells having fundamental building blocks of a common design. Some macrocells may include multiplexer functionality having a number of data input signals and a number of select input signals. As the need for multiplexers having a greater number of data input signals grows, the silicon real estate needed can more than double for each doubling of the number of inputs. Therefore, a need exists to reduce the silicon real estate needed to perform functions of multiplexers, e.g., having 4 or more data input signals.